/* * URB AHCI HCD (Host Controller Driver) for USB. * * (C) Copyright 1999 Roman Weissgaerber * (C) Copyright 2000-2001 David Brownell * (C) Copyright 2003 Junius Chen * (C) Copyright 2005 Sergey Mudry * * [ Initialisation is based on Linus' ] * [ uhci code and gregs ohci fragments ] * [ (C) Copyright 1999 Linus Torvalds ] * [ (C) Copyright 1999 Gregory P. Smith] * * * History: * v1.0 2003/09/09 initial release * V1.1 2003/09/16 Fix Storage Problem, fix bulk out performance issue. * v1.2 2005/11/09 many fixes * v1.3 2006/04/04 compatible with kamikaze */ #include #include #include #include #include #include #include #include #include #include #include #include #include #include /* for in_interrupt() */ //#define DEBUG #undef DEBUG #include #include #include #include #include //jk#include #include #include "usb-shci.h" #include "../hcd.h" static char hcd_name[] = "adm5120-hcd"; /* * Version Information */ #define DRIVER_VERSION "v1.2" #define DRIVER_AUTHOR "Junius Chen,Roman Weissgaerber,David Brownell,Sergey Mudry,Marcel Groothuis" #define DRIVER_DESC "USB AHCI Host Controller Driver" #define OHCI_UNLINK_TIMEOUT (HZ / 10) static LIST_HEAD (ohci_hcd_list); static spinlock_t usb_ed_lock = SPIN_LOCK_UNLOCKED; #define ReadDw(addr) ((*(volatile unsigned int *)(addr))) #define WriteDw(b,addr) ((*(volatile unsigned int *)(addr)) = (b)) /*-------------------------------------------------------------------------*/ static inline u32 roothub_status (struct ohci *hc) { return ReadDw (&hc->regs->rhdescriptor); } static u32 roothub_portstatus (struct ohci *hc, int i) { return ReadDw (&hc->regs->portstatus[i]); } /*-------------------------------------------------------------------------* * URB (USB Request Block) support functions *-------------------------------------------------------------------------*/ /* free HCD-private data associated with this URB */ static void urb_free_priv_ahci (struct ohci *hc, urb_priv_t * urb_priv) { //int i; int last = urb_priv->length - 1; int len; int dir; struct td *td; DPRINTF("urb_free_priv_ahci\n"); if (last >= 0) { /* ISOC, BULK, INTR data buffer starts at td 0 * CTRL setup starts at td 0 */ td = (struct td*) urb_priv->ed->TD_Addr[0]; len = td->urb->transfer_buffer_length, dir = usb_pipeout (td->urb->pipe) ? PCI_DMA_TODEVICE : PCI_DMA_FROMDEVICE; /* unmap CTRL URB setup */ if (usb_pipecontrol (td->urb->pipe)) { pci_unmap_single (hc->ohci_dev, td->data_dma, 8, PCI_DMA_TODEVICE); /* CTRL data buffer starts at td 1 if len > 0 */ if (len && last > 0) td = (struct td*) urb_priv->ed->TD_Addr[1]; } /* unmap data buffer */ if (len && td->data_dma) pci_unmap_single (hc->ohci_dev, td->data_dma, len, dir); /* for (i = 0; i <= last; i++) { td = (struct td*) urb_priv->ed->TD_Addr[i]; td_tp = le32_to_cpu(td->hwNextTD); td = dma_to_td(hc,td_tp); if (td) td_free (hc, td); } */ } DPRINTF("Free URB Priv %p \n",urb_priv); kfree (urb_priv); } static void urb_rm_priv_locked_ahci (struct urb * urb) { urb_priv_t * urb_priv = urb->hcpriv; DPRINTF("urb_rm_priv_locked_ahci\n"); if (urb_priv) { urb->hcpriv = NULL; #ifdef DO_TIMEOUTS if (urb->timeout) { list_del (&urb->urb_list); urb->timeout -= jiffies; } #endif /* Release int/iso bandwidth */ if (urb->bandwidth) { switch (usb_pipetype(urb->pipe)) { case PIPE_INTERRUPT: usb_release_bandwidth (urb->dev, urb, 0); break; case PIPE_ISOCHRONOUS: usb_release_bandwidth (urb->dev, urb, 1); break; default: break; } } urb_free_priv_ahci ((struct ohci *)urb->dev->bus->hcpriv, urb_priv); usb_dec_dev_use (urb->dev); //MG: weg??? urb->dev = NULL; // } else { // if (urb->dev != NULL) { // err ("Non-null dev at rm_priv time"); // // urb->dev = NULL; // } } } /*-------------------------------------------------------------------------*/ #if 0 //MG: onderstaande code nakijken static int sahci_get_current_frame_number (struct usb_device * dev); /* debug| print the main components of an URB * small: 0) header + data packets 1) just header */ static void urb_print (struct urb * urb, char * str, int small) { unsigned int pipe= urb->pipe; if (!urb->dev || !urb->dev->bus) { dbg("%s URB: no dev", str); return; } #ifndef AHCI_VERBOSE_DEBUG if (urb->status != 0) #endif dbg("%s URB:[%4x] dev:%2d,ep:%2d-%c,type:%s,flags:%4x,len:%d/%d,stat:%d(%x)", str, sohci_get_current_frame_number (urb->dev), usb_pipedevice (pipe), usb_pipeendpoint (pipe), usb_pipeout (pipe)? 'O': 'I', usb_pipetype (pipe) < 2? (usb_pipeint (pipe)? "INTR": "ISOC"): (usb_pipecontrol (pipe)? "CTRL": "BULK"), urb->transfer_flags, urb->actual_length, urb->transfer_buffer_length, urb->status, urb->status); #ifdef OHCI_VERBOSE_DEBUG if (!small) { int i, len; if (usb_pipecontrol (pipe)) { printk (KERN_DEBUG __FILE__ ": cmd(8):"); for (i = 0; i < 8 ; i++) printk (" %02x", ((__u8 *) urb->setup_packet) [i]); printk ("\n"); } if (urb->transfer_buffer_length > 0 && urb->transfer_buffer) { printk (KERN_DEBUG __FILE__ ": data(%d/%d):", urb->actual_length, urb->transfer_buffer_length); len = usb_pipeout (pipe)? urb->transfer_buffer_length: urb->actual_length; for (i = 0; i < 16 && i < len; i++) printk (" %02x", ((__u8 *) urb->transfer_buffer) [i]); printk ("%s stat:%d\n", i < len? "...": "", urb->status); } } #endif } /* just for debugging; prints non-empty branches of the int ed tree inclusive iso eds*/ void ep_print_int_eds (ohci_t * ohci, char * str) { int i, j; __u32 * ed_p; for (i= 0; i < 32; i++) { j = 5; ed_p = &(ohci->hcca->int_table [i]); if (*ed_p == 0) continue; printk (KERN_DEBUG __FILE__ ": %s branch int %2d(%2x):", str, i, i); while (*ed_p != 0 && j--) { ed_t *ed = dma_to_ed (ohci, le32_to_cpup(ed_p)); printk (" ed: %4x;", ed->hwINFO); ed_p = &ed->hwNextED; } printk ("\n"); } } static void ohci_dump_intr_mask (char *label, __u32 mask) { dbg ("%s: 0x%08x%s%s%s%s%s%s%s%s%s", label, mask, (mask & OHCI_INTR_MIE) ? " MIE" : "", (mask & OHCI_INTR_OC) ? " OC" : "", (mask & OHCI_INTR_RHSC) ? " RHSC" : "", (mask & OHCI_INTR_FNO) ? " FNO" : "", (mask & OHCI_INTR_UE) ? " UE" : "", (mask & OHCI_INTR_RD) ? " RD" : "", (mask & OHCI_INTR_SF) ? " SF" : "", (mask & OHCI_INTR_WDH) ? " WDH" : "", (mask & OHCI_INTR_SO) ? " SO" : "" ); } static void maybe_print_eds (char *label, __u32 value) { if (value) dbg ("%s %08x", label, value); } static char *hcfs2string (int state) { switch (state) { case OHCI_USB_RESET: return "reset"; case OHCI_USB_RESUME: return "resume"; case OHCI_USB_OPER: return "operational"; case OHCI_USB_SUSPEND: return "suspend"; } return "?"; } // dump control and status registers static void ohci_dump_status (ohci_t *controller) { struct ohci_regs *regs = controller->regs; __u32 temp; temp = readl (®s->revision) & 0xff; if (temp != 0x10) dbg ("spec %d.%d", (temp >> 4), (temp & 0x0f)); temp = readl (®s->control); dbg ("control: 0x%08x%s%s%s HCFS=%s%s%s%s%s CBSR=%d", temp, (temp & OHCI_CTRL_RWE) ? " RWE" : "", (temp & OHCI_CTRL_RWC) ? " RWC" : "", (temp & OHCI_CTRL_IR) ? " IR" : "", hcfs2string (temp & OHCI_CTRL_HCFS), (temp & OHCI_CTRL_BLE) ? " BLE" : "", (temp & OHCI_CTRL_CLE) ? " CLE" : "", (temp & OHCI_CTRL_IE) ? " IE" : "", (temp & OHCI_CTRL_PLE) ? " PLE" : "", temp & OHCI_CTRL_CBSR ); temp = readl (®s->cmdstatus); dbg ("cmdstatus: 0x%08x SOC=%d%s%s%s%s", temp, (temp & OHCI_SOC) >> 16, (temp & OHCI_OCR) ? " OCR" : "", (temp & OHCI_BLF) ? " BLF" : "", (temp & OHCI_CLF) ? " CLF" : "", (temp & OHCI_HCR) ? " HCR" : "" ); ohci_dump_intr_mask ("intrstatus", readl (®s->intrstatus)); ohci_dump_intr_mask ("intrenable", readl (®s->intrenable)); // intrdisable always same as intrenable // ohci_dump_intr_mask ("intrdisable", readl (®s->intrdisable)); maybe_print_eds ("ed_periodcurrent", readl (®s->ed_periodcurrent)); maybe_print_eds ("ed_controlhead", readl (®s->ed_controlhead)); maybe_print_eds ("ed_controlcurrent", readl (®s->ed_controlcurrent)); maybe_print_eds ("ed_bulkhead", readl (®s->ed_bulkhead)); maybe_print_eds ("ed_bulkcurrent", readl (®s->ed_bulkcurrent)); maybe_print_eds ("donehead", readl (®s->donehead)); } static void ohci_dump_roothub (ohci_t *controller, int verbose) { __u32 temp, ndp, i; temp = roothub_a (controller); if (temp == ~(u32)0) return; ndp = (temp & RH_A_NDP); if (verbose) { dbg ("roothub.a: %08x POTPGT=%d%s%s%s%s%s NDP=%d", temp, ((temp & RH_A_POTPGT) >> 24) & 0xff, (temp & RH_A_NOCP) ? " NOCP" : "", (temp & RH_A_OCPM) ? " OCPM" : "", (temp & RH_A_DT) ? " DT" : "", (temp & RH_A_NPS) ? " NPS" : "", (temp & RH_A_PSM) ? " PSM" : "", ndp ); temp = roothub_b (controller); dbg ("roothub.b: %08x PPCM=%04x DR=%04x", temp, (temp & RH_B_PPCM) >> 16, (temp & RH_B_DR) ); temp = roothub_status (controller); dbg ("roothub.status: %08x%s%s%s%s%s%s", temp, (temp & RH_HS_CRWE) ? " CRWE" : "", (temp & RH_HS_OCIC) ? " OCIC" : "", (temp & RH_HS_LPSC) ? " LPSC" : "", (temp & RH_HS_DRWE) ? " DRWE" : "", (temp & RH_HS_OCI) ? " OCI" : "", (temp & RH_HS_LPS) ? " LPS" : "" ); } for (i = 0; i < ndp; i++) { temp = roothub_portstatus (controller, i); dbg ("roothub.portstatus [%d] = 0x%08x%s%s%s%s%s%s%s%s%s%s%s%s", i, temp, (temp & RH_PS_PRSC) ? " PRSC" : "", (temp & RH_PS_OCIC) ? " OCIC" : "", (temp & RH_PS_PSSC) ? " PSSC" : "", (temp & RH_PS_PESC) ? " PESC" : "", (temp & RH_PS_CSC) ? " CSC" : "", (temp & RH_PS_LSDA) ? " LSDA" : "", (temp & RH_PS_PPS) ? " PPS" : "", (temp & RH_PS_PRS) ? " PRS" : "", (temp & RH_PS_POCI) ? " POCI" : "", (temp & RH_PS_PSS) ? " PSS" : "", (temp & RH_PS_PES) ? " PES" : "", (temp & RH_PS_CCS) ? " CCS" : "" ); } } static void ohci_dump (ohci_t *controller, int verbose) { dbg ("OHCI controller usb-%s state", controller->ohci_dev->slot_name); // dumps some of the state we know about ohci_dump_status (controller); if (verbose) ep_print_int_eds (controller, "hcca"); dbg ("hcca frame #%04x", controller->hcca->frame_no); ohci_dump_roothub (controller, 1); } #endif //0 MG /*-------------------------------------------------------------------------*/ static void urb_rm_priv_ahci (struct urb * urb) { unsigned long flags; spin_lock_irqsave (&usb_ed_lock, flags); urb_rm_priv_locked_ahci (urb); spin_unlock_irqrestore (&usb_ed_lock, flags); } /*-------------------------------------------------------------------------* * Interface functions (URB) *-------------------------------------------------------------------------*/ /* return a request to the completion handler */ static int sahci_return_urb (struct ohci *hc, struct urb * urb) { urb_priv_t * urb_priv = urb->hcpriv; struct urb * urbt; unsigned long flags; int i; td_t *td_tp; DPRINTF("sahci_return_urb\n"); if (!urb_priv) return -1; /* urb already unlinked */ /* just to be sure */ if (!urb->complete) { urb_rm_priv_ahci (urb); return -1; } DPRINTF("URB RET [%p]\n",urb); switch (usb_pipetype (urb->pipe)) { case PIPE_INTERRUPT: td_tp = (struct td *) urb_priv->ed->TD_Addr[0]; pci_unmap_single (hc->ohci_dev, td_tp->data_dma, urb->transfer_buffer_length, usb_pipeout (urb->pipe) ? PCI_DMA_TODEVICE : PCI_DMA_FROMDEVICE); urb->complete (urb); /* implicitly requeued */ urb->actual_length = 0; urb->status = USB_ST_URB_PENDING; if (urb_priv->state != URB_DEL) td_submit_urb_ahci (urb); break; case PIPE_ISOCHRONOUS: for (urbt = urb->next; urbt && (urbt != urb); urbt = urbt->next); if (urbt) { // send the reply and requeue URB pci_unmap_single (hc->ohci_dev, urb_priv->td [0]->data_dma, urb->transfer_buffer_length, usb_pipeout (urb->pipe) ? PCI_DMA_TODEVICE : PCI_DMA_FROMDEVICE); urb->complete (urb); spin_lock_irqsave (&usb_ed_lock, flags); urb->actual_length = 0; urb->status = USB_ST_URB_PENDING; urb->start_frame = urb_priv->ed->last_iso + 1; if (urb_priv->state != URB_DEL) { for (i = 0; i < urb->number_of_packets; i++) { urb->iso_frame_desc[i].actual_length = 0; urb->iso_frame_desc[i].status = -EXDEV; } td_submit_urb_ahci (urb); } spin_unlock_irqrestore (&usb_ed_lock, flags); } else { /* unlink URB, call complete */ urb_rm_priv_ahci (urb); urb->complete (urb); } break; case PIPE_BULK: case PIPE_CONTROL: /* unlink URB, call complete */ urb_rm_priv_ahci (urb); urb->complete (urb); break; } return 0; } /*-------------------------------------------------------------------------*/ /* get a transfer request */ static int sahci_submit_urb (struct urb * urb) { ohci_t * ohci; ed_t * ed; urb_priv_t * urb_priv; unsigned int pipe = urb->pipe; int maxps = usb_maxpacket (urb->dev, pipe, usb_pipeout (pipe)); int i, size = 0; unsigned long flags; int bustime = 0; int mem_flags = ALLOC_FLAGS; DPRINTF("sahci_submit_urb: (%p) ",urb); if (!urb->dev || !urb->dev->bus) { DPRINTF("sahci_submit_urb: -ENODEV\n"); return -ENODEV; } if (urb->hcpriv) /* urb already in use */ { DPRINTF("sahci_submit_urb: -EINVAL\n"); return -EINVAL; } usb_inc_dev_use (urb->dev); ohci = (ohci_t *) urb->dev->bus->hcpriv; #ifdef DEBUG //urb_print (urb, "SUB", usb_pipein (pipe)); #endif /* handle a request to the virtual root hub */ if (usb_pipedevice (pipe) == ohci->rh.devnum) #ifdef DEBUG { int retval; retval = ahci_rh_submit_urb (urb); DPRINTF("sahci_submit_urb: rh_s retval: (%i)\n",retval); return retval; } #else return ahci_rh_submit_urb (urb); #endif DPRINTF("URB SUB[%p] PIPE[%08x] size[%04x]\n",urb,pipe,urb->transfer_buffer_length); /* when controller's hung, permit only roothub cleanup attempts * such as powering down ports */ if (ohci->disabled) { DPRINTF("ohci->disabled %p\n",urb->dev); usb_dec_dev_use (urb->dev); return -ESHUTDOWN; } DPRINTF("Pipe = %08x \n",pipe); /* every endpoint has a ed, locate and fill it */ if (!(ed = ep_add_ed_ahci (urb->dev, pipe, urb->interval, 1, mem_flags))) { usb_dec_dev_use (urb->dev); printk("sahci_submit_urb: ep_add_ed() failed!!\n"); return -ENOMEM; } /* for the private part of the URB we need the number of TDs (size) */ switch (usb_pipetype (pipe)) { case PIPE_BULK: /* one TD for every 4096 Byte */ size = (urb->transfer_buffer_length - 1) / 4096 + 1; /* If the transfer size is multiple of the pipe mtu, * we may need an extra TD to create a empty frame * Jean II */ if ((urb->transfer_flags & USB_ZERO_PACKET) && usb_pipeout (pipe) && (urb->transfer_buffer_length != 0) && ((urb->transfer_buffer_length % maxps) == 0)) size++; DPRINTF("sahci_submit_urb:BULK: size=%d ", size); break; case PIPE_ISOCHRONOUS: /* number of packets from URB */ DPRINTF("sahci_submit_urb: ISOCHRONOUS "); size = urb->number_of_packets; if (size <= 0) { usb_dec_dev_use (urb->dev); return -EINVAL; } for (i = 0; i < urb->number_of_packets; i++) { urb->iso_frame_desc[i].actual_length = 0; urb->iso_frame_desc[i].status = -EXDEV; } break; case PIPE_CONTROL: /* 1 TD for setup, 1 for ACK and 1 for every 4096 B */ DPRINTF("sahci_submit_urb: Control "); size = (urb->transfer_buffer_length == 0)? 2: (urb->transfer_buffer_length - 1) / 4096 + 3; break; case PIPE_INTERRUPT: /* one TD */ DPRINTF("sahci_submit_urb: Interrupt "); size = 1; break; } /* allocate the private part of the URB */ urb_priv = kmalloc (sizeof (urb_priv_t) + size * sizeof (td_t *), in_interrupt() ? GFP_ATOMIC : GFP_KERNEL); //MG: dit is het bij OHCI: urb_priv = kmalloc (sizeof (urb_priv_t) + size * sizeof (td_t *), GFP_ATOMIC : GFP_KERNEL); DPRINTF(" URB private %p \n",urb_priv); if (!urb_priv) { usb_dec_dev_use (urb->dev); return -ENOMEM; } memset (urb_priv, 0, sizeof (urb_priv_t) + size * sizeof (td_t *)); /* fill the private part of the URB */ urb_priv->length = size; urb_priv->ed = ed; /* allocate the TDs (updating hash chains) */ spin_lock_irqsave (&usb_ed_lock, flags); /* move for new arch. for (i = 0; i < size; i++) { urb_priv->ed->TD_Addr[i] = td_alloc (ohci, SLAB_ATOMIC); if (!urb_priv->ed->TD_Addr[i]) { urb_priv->length = i; urb_free_priv_ahci (ohci, urb_priv); spin_unlock_irqrestore (&usb_ed_lock, flags); usb_dec_dev_use (urb->dev); return -ENOMEM; } } */ if (ed->state == ED_NEW || (ed->state & ED_DEL)) { urb_free_priv_ahci (ohci, urb_priv); spin_unlock_irqrestore (&usb_ed_lock, flags); usb_dec_dev_use (urb->dev); return -EINVAL; } /* allocate and claim bandwidth if needed; ISO * needs start frame index if it was't provided. */ switch (usb_pipetype (pipe)) { case PIPE_ISOCHRONOUS: if (urb->transfer_flags & USB_ISO_ASAP) { urb->start_frame = ((ed->state == ED_OPER) ? (ed->last_iso + 1) : (ReadDw (&ohci->regs->fmnumber) + 10)) & 0xffff; } /* FALLTHROUGH */ case PIPE_INTERRUPT: if (urb->bandwidth == 0) { bustime = usb_check_bandwidth (urb->dev, urb); } if (bustime < 0) { urb_free_priv_ahci (ohci, urb_priv); spin_unlock_irqrestore (&usb_ed_lock, flags); usb_dec_dev_use (urb->dev); return bustime; } usb_claim_bandwidth (urb->dev, urb, bustime, usb_pipeisoc (urb->pipe)); #ifdef DO_TIMEOUTS urb->timeout = 0; #endif } urb->actual_length = 0; urb->hcpriv = urb_priv; urb->status = USB_ST_URB_PENDING; /* link the ed into a chain if is not already */ // if (ed->state != ED_OPER) //MG: weet niet of ep_link werkt // ep_link (ohci, ed); //niet dus... /* fill the TDs and link it to the ed */ td_submit_urb_ahci (urb); #ifdef DO_TIMEOUTS /* maybe add to ordered list of timeouts */ if (urb->timeout) { struct list_head *entry; urb->timeout += jiffies; list_for_each (entry, &ohci->timeout_list) { struct urb *next_urb; next_urb = list_entry (entry, struct urb, urb_list); if (time_after_eq (urb->timeout, next_urb->timeout)) break; } list_add (&urb->urb_list, entry); /* drive timeouts by SF (messy, but works) */ writel (OHCI_INTR_SF, &ohci->regs->intrenable); } #endif spin_unlock_irqrestore (&usb_ed_lock, flags); return 0; } /*-------------------------------------------------------------------------*/ /* deactivate all TDs and remove the private part of the URB */ /* interrupt callers must use async unlink mode */ static int sahci_unlink_urb (struct urb * urb) { //unsigned long flags; ohci_t * ohci; DPRINTF("sahci_unlink_urb\n"); if (!urb) /* just to be sure */ return -EINVAL; if (!urb->dev || !urb->dev->bus) return -ENODEV; ohci = (ohci_t *) urb->dev->bus->hcpriv; DPRINTF("URB UNLINK[%p]\n",urb); /* handle a request to the virtual root hub */ if (usb_pipedevice (urb->pipe) == ohci->rh.devnum) return ahci_rh_unlink_urb (urb); if (urb->hcpriv && (urb->status == USB_ST_URB_PENDING)) { if (!ohci->disabled) { urb_priv_t * urb_priv; /* interrupt code may not sleep; it must use * async status return to unlink pending urbs. */ if (!(urb->transfer_flags & USB_ASYNC_UNLINK) && in_interrupt ()) { err ("bug in call from %p; use async!", __builtin_return_address(0)); return -EWOULDBLOCK; } /* flag the urb and its TDs for deletion in some * upcoming SF interrupt delete list processing */ urb_priv = urb->hcpriv; if (!urb_priv || (urb_priv->state == URB_DEL)) { return 0; } urb_priv->state = URB_DEL; //MG: // ep_rm_ed (urb->dev, urb_priv->ed); // urb_priv->ed->state |= ED_URB_DEL; //- // if (!(urb->transfer_flags & USB_ASYNC_UNLINK)) { // DPRINTF("sahci_unlink_urb: missing code\n"); // } else { // /* usb_dec_dev_use done in dl_del_list() */ // urb->status = -EINPROGRESS; // spin_unlock_irqrestore (&usb_ed_lock, flags); // } // } else { urb_rm_priv_ahci (urb); if (urb->transfer_flags & USB_ASYNC_UNLINK) { urb->status = -ECONNRESET; if (urb->complete) urb->complete (urb); } else urb->status = -ENOENT; } } return 0; } /*-------------------------------------------------------------------------*/ /* allocate private data space for a usb device */ static int sahci_alloc_dev (struct usb_device *usb_dev) { struct ohci_device * dev; ohci_t * ohci = usb_dev->bus->hcpriv; struct ohci_device * next_dev; __u32 HostHeadStart; DPRINTF("sahci_alloc_dev "); dev = dev_alloc ((struct ohci *) usb_dev->bus->hcpriv, ALLOC_FLAGS); if (!dev) { DPRINTF("no memory!! "); return -ENOMEM; } usb_dev->hcpriv = dev; DPRINTF("devnum: %i HC Priv = %p \n", usb_dev->devnum,usb_dev->hcpriv); // WriteDw(2,&ohci->regs->hostcontrol); // mdelay(5); HostHeadStart=ReadDw(&ohci->regs->ed_hosthead); if ( HostHeadStart == 0) //NULL) { DPRINTF("HostHeadStart == 0\n"); WriteDw((int)usb_dev->hcpriv,&ohci->regs->ed_hosthead); //temp sol. dev->ed[NUM_EDS-1].IsLast = 1; dev->ed[NUM_EDS-1].hwNextED = (__u32) dev; return 0; } next_dev = (struct ohci_device *)HostHeadStart; DPRINTF("Next Point = %08x \n",(unsigned int) next_dev->ed[NUM_EDS-1].hwNextED); while (!(next_dev->ed[NUM_EDS-1].IsLast)) { next_dev = (struct ohci_device *)next_dev->ed[NUM_EDS-1].hwNextED; } next_dev->ed[NUM_EDS-1].IsLast = 0; next_dev->ed [NUM_EDS-1].hwNextED = (__u32) dev; dev->ed[NUM_EDS-1].IsLast = 1; dev->ed[NUM_EDS-1].hwNextED = HostHeadStart; // WriteDw(usb_dev->hcpriv,&ohci->regs->ed_hosthead); //temp sol. // mdelay(10); return 0; } /*-------------------------------------------------------------------------*/ /* may be called from interrupt context */ /* frees private data space of usb device */ static int sahci_free_dev (struct usb_device * usb_dev) { unsigned long flags; int i = 0, cnt = 0,j = 0; struct ohci_device * dev = usb_to_ahci (usb_dev); struct ohci_device * prev_dev; ohci_t * ohci = usb_dev->bus->hcpriv; struct td *td; __u32 HostHeadStart; DPRINTF("sahci_free_dev: %p\n", dev); if (!dev) return 0; if (usb_dev->devnum >= 0) { /* driver disconnects should have unlinked all urbs * (freeing all the TDs, unlinking EDs) but we need * to defend against bugs that prevent that. */ spin_lock_irqsave (&usb_ed_lock, flags); WriteDw(2,&ohci->regs->hostcontrol); mdelay(10); HostHeadStart=ReadDw(&ohci->regs->ed_hosthead); prev_dev = (struct ohci_device *)HostHeadStart; while (!(prev_dev->ed[NUM_EDS-1].IsLast)) { if ( dev == (struct ohci_device *)prev_dev->ed[NUM_EDS-1].hwNextED ) { prev_dev->ed[NUM_EDS-1].IsLast = dev->ed[NUM_EDS-1].IsLast; prev_dev->ed[NUM_EDS-1].hwNextED =dev->ed[NUM_EDS-1].hwNextED; break; } prev_dev = (struct ohci_device *)prev_dev->ed[NUM_EDS-1].hwNextED; } // for(i = 0; i < NUM_EDS; i++) { // ed = &(dev->ed[i]); // if (ed->state != ED_NEW) { // if (ed->state == ED_OPER) { // /* driver on that interface didn't unlink an urb */ // // dbg ("driver usb-%s dev %d ed 0x%x unfreed URB", // // ohci->ohci_dev->slot_name, usb_dev->devnum, i); // ep_unlink (ohci, ed); // } // ep_rm_ed (usb_dev, ed); // ed->state = ED_DEL; // cnt++; // } // } //free allocated TD for(i=0;ied[i].TD_Addr[j]) { td = (struct td *)dev->ed[i].TD_Addr[j]; td_free(ohci,td); } } if (dev->ed[i].TD_Addr[3]) dev->ed[i].TD_Addr[3] &= 0xDFFFFFFF; kfree( (void *)dev->ed[i].TD_Addr[3]); } spin_unlock_irqrestore (&usb_ed_lock, flags); mdelay(100); WriteDw(6,&ohci->regs->hostcontrol); /* if the controller is running, tds for those unlinked * urbs get freed by dl_del_list at the next SF interrupt */ if (cnt > 0) { if (ohci->disabled) { /* FIXME: Something like this should kick in, * though it's currently an exotic case ... * the controller won't ever be touching * these lists again!! dl_del_list (ohci, le16_to_cpu (ohci->hcca->frame_no) & 1); */ warn ("TD leak, %d", cnt); } else if (!in_interrupt ()) { DPRINTF("sahci_free_dev: missing code\n"); /* DECLARE_WAIT_QUEUE_HEAD (freedev_wakeup); DECLARE_WAITQUEUE (wait, current); int timeout = OHCI_UNLINK_TIMEOUT; */ /* SF interrupt handler calls dl_del_list */ /* add_wait_queue (&dev->wait, &wait); set_current_state(TASK_UNINTERRUPTIBLE); while (timeout && dev->ed_cnt) timeout = schedule_timeout (timeout); set_current_state(TASK_RUNNING); remove_wait_queue (&dev->wait, &wait); if (dev->ed_cnt) { err ("free device %d timeout", usb_dev->devnum); return -ETIMEDOUT; } */ } else { /* likely some interface's driver has a refcount bug */ err ("bus %s devnum %d deletion in interrupt", ohci->ohci_dev->slot_name, usb_dev->devnum); BUG (); } } } /* free device, and associated EDs */ dev_free (ohci, dev); return 0; } /*-------------------------------------------------------------------------*/ /* tell us the current USB frame number */ static int sahci_get_current_frame_number (struct usb_device *usb_dev) { ohci_t * ohci = usb_dev->bus->hcpriv; DPRINTF("sahci_get_current_frame_number\n"); return le16_to_cpu (ohci->regs->fmnumber); } /*-------------------------------------------------------------------------*/ struct usb_operations sahci_device_operations = { sahci_alloc_dev, sahci_free_dev, sahci_get_current_frame_number, sahci_submit_urb, sahci_unlink_urb }; #if 0 //MG added 05-03-2006 /*-------------------------------------------------------------------------* * ED handling functions *-------------------------------------------------------------------------*/ /* search for the right branch to insert an interrupt ed into the int tree * do some load ballancing; * returns the branch and * sets the interval to interval = 2^integer (ld (interval)) */ static int ep_int_ballance (ohci_t * ohci, int interval, int load) { int i, branch = 0; /* search for the least loaded interrupt endpoint branch of all 32 branches */ for (i = 0; i < 32; i++) if (ohci->ohci_int_load [branch] > ohci->ohci_int_load [i]) branch = i; branch = branch % interval; for (i = branch; i < 32; i += interval) ohci->ohci_int_load [i] += load; /*-------------------------------------------------------------------------*/ /* the int tree is a binary tree * in order to process it sequentially the indexes of the branches have to be mapped * the mapping reverses the bits of a word of num_bits length */ static int ep_rev (int num_bits, int word) { int i, wout = 0; for (i = 0; i < num_bits; i++) wout |= (((word >> i) & 1) << (num_bits - i - 1)); return wout; } /*-------------------------------------------------------------------------*/ /* link an ed into one of the HC chains */ static int ep_link (ohci_t * ohci, ed_t * edi) { int i; int inter; __u32 * ed_p; volatile ed_t * ed = edi; ed->state = ED_OPER; switch (ed->type) { case PIPE_CONTROL: if (ohci->ed_controltail == NULL) { //writel (ed->dma, &ohci->regs->ed_controlhead); // WriteDw(2,&ohci->regs->hostcontrol); // WriteDw(2,&ohci->regs->hostcontrol); WriteDw(ed->dma,&ohci->regs->ed_hosthead); WriteDw(6,&ohci->regs->hostcontrol); ohci->ed_start = ed; } else { ohci->ed_controltail->hwNextED = cpu_to_le32(ed->dma); } ed->ed_prev = ohci->ed_controltail; if (!ohci->ed_controltail && !ohci->ed_rm_list[0] && !ohci->ed_rm_list[1] && !ohci->sleeping) { // ohci->hc_control |= OHCI_CTRL_DMA_EN; //writel (ohci->hc_control, &ohci->regs->control); // // WriteDw(ohci->hc_control,&ohci->regs->hostcontrol); } ohci->ed_controltail = edi; break; case PIPE_BULK: //ed->hwNextED = &ed->unused[0]; //for workaround HW bug 20030724 Junius ed->hwNextED = (ed->dma)+0x30; //for workaround HW bug 20030724 Junius if (ohci->ed_controltail == NULL) { //writel (ed->dma, &ohci->regs->ed_controlhead); // WriteDw(2,&ohci->regs->hostcontrol); // WriteDw(2,&ohci->regs->hostcontrol); WriteDw(ed->dma,&ohci->regs->ed_hosthead); // mdelay(1); WriteDw(6,&ohci->regs->hostcontrol); ohci->ed_start = ed; } else { ohci->ed_controltail->hwNextED = cpu_to_le32(ed->dma); } ed->ed_prev = ohci->ed_controltail; if (!ohci->ed_controltail && !ohci->ed_rm_list[0] && !ohci->ed_rm_list[1] && !ohci->sleeping) { // WriteDw(ohci->hc_control,&ohci->regs->hostcontrol); } ohci->ed_controltail = edi; break; case PIPE_INTERRUPT: //ed->hwNextED = &ed->unused[0]; //for workaround HW bug 20030724 Junius ed->hwNextED = (ed->dma)+0x30; //for workaround HW bug 20030724 Junius ed->hwINFO |= cpu_to_le32(OHCI_ED_INT); if (ohci->ed_controltail == NULL) { //writel (ed->dma, &ohci->regs->ed_controlhead); // WriteDw(2,&ohci->regs->hostcontrol); // WriteDw(2,&ohci->regs->hostcontrol); WriteDw(ed->dma,&ohci->regs->ed_hosthead); // mdelay(1); WriteDw(6,&ohci->regs->hostcontrol); ohci->ed_start = ed; } else { ohci->ed_controltail->hwNextED = cpu_to_le32(ed->dma); } ed->ed_prev = ohci->ed_controltail; if (!ohci->ed_controltail && !ohci->ed_rm_list[0] && !ohci->ed_rm_list[1] && !ohci->sleeping) { // WriteDw(ohci->hc_control,&ohci->regs->hostcontrol); } ohci->ed_controltail = edi; break; case PIPE_ISOCHRONOUS: break; } return 0; } /*-------------------------------------------------------------------------*/ /* unlink an ed from one of the HC chains. * just the link to the ed is unlinked. * the link from the ed still points to another operational ed or 0 * so the HC can eventually finish the processing of the unlinked ed */ static int ep_unlink (ohci_t * ohci, ed_t * ed) { // int i; // __u32 * ed_p; ed->hwINFO |= cpu_to_le32 (OHCI_ED_SKIP); DPRINTF("EP_UNLINK====\n"); switch (ed->type) { case PIPE_CONTROL: if (ed->ed_prev == NULL) { if (!ed->hwNextED) { ohci->hc_control &= ~OHCI_CTRL_CLE; // writel (ohci->hc_control, &ohci->regs->control); } //if ( (ed->hwNextED)== (&ed->unused[0])) // WriteDw(2,&ohci->regs->hostcontrol); // WriteDw(2,&ohci->regs->hostcontrol); if (ed->hwNextED == (ed->dma)+0x30) WriteDw ( 0,&ohci->regs->ed_hosthead); else WriteDw (le32_to_cpup (&ed->hwNextED), &ohci->regs->ed_hosthead); // mdelay(1); // WriteDw(6,&ohci->regs->hostcontrol); } else { if ( ed->hwNextED == (ed->dma)+0x30) { ed->ed_prev->hwNextED = (ed->ed_prev->dma)+0x30; } else ed->ed_prev->hwNextED = ed->hwNextED; } if (ohci->ed_controltail == ed) { ohci->ed_controltail = ed->ed_prev; } else { (dma_to_ed (ohci, le32_to_cpup (&ed->hwNextED)))->ed_prev = ed->ed_prev; } break; case PIPE_BULK: if (ed->ed_prev == NULL) { if (!ed->hwNextED) { ohci->hc_control &= ~OHCI_CTRL_CLE; // writel (ohci->hc_control, &ohci->regs->control); } // WriteDw(2,&ohci->regs->hostcontrol); // WriteDw(2,&ohci->regs->hostcontrol); WriteDw (le32_to_cpup (&ed->hwNextED), &ohci->regs->ed_hosthead); // mdelay(1); WriteDw(6,&ohci->regs->hostcontrol); } else { if ( ed->hwNextED == (ed->dma)+0x30) { ed->ed_prev->hwNextED = (ed->ed_prev->dma)+0x30; } else ed->ed_prev->hwNextED = ed->hwNextED; } if (ohci->ed_controltail == ed) { ohci->ed_controltail = ed->ed_prev; } else { (dma_to_ed (ohci, le32_to_cpup (&ed->hwNextED)))->ed_prev = ed->ed_prev; } break; case PIPE_INTERRUPT: if (ed->ed_prev == NULL) { if (!ed->hwNextED) { ohci->hc_control &= ~OHCI_CTRL_CLE; // writel (ohci->hc_control, &ohci->regs->control); } // WriteDw(2,&ohci->regs->hostcontrol); // WriteDw(2,&ohci->regs->hostcontrol); WriteDw (le32_to_cpup (&ed->hwNextED), &ohci->regs->ed_hosthead); // mdelay(1); WriteDw(6,&ohci->regs->hostcontrol); } else { if ( ed->hwNextED == (ed->dma)+0x30) { ed->ed_prev->hwNextED = (ed->ed_prev->dma)+0x30; } else ed->ed_prev->hwNextED = ed->hwNextED; } if (ohci->ed_controltail == ed) { ohci->ed_controltail = ed->ed_prev; } else { (dma_to_ed (ohci, le32_to_cpup (&ed->hwNextED)))->ed_prev = ed->ed_prev; } break; case PIPE_ISOCHRONOUS: break; } ed->state = ED_UNLINK; return 0; } #endif /*-------------------------------------------------------------------------*/ /* add/reinit an endpoint; this should be done once at the usb_set_configuration command, * but the USB stack is a little bit stateless so we do it at every transaction * if the state of the ed is ED_NEW then a dummy td is added and the state is changed to ED_UNLINK * in all other cases the state is left unchanged * the ed info fields are setted anyway even though most of them should not change */ static ed_t * ep_add_ed_ahci ( struct usb_device * usb_dev, unsigned int pipe, int interval, int load, int mem_flags ) { ohci_t * ohci = usb_dev->bus->hcpriv; td_t * td; ed_t * ed_ret; volatile ed_t * ed; unsigned long flags; DPRINTF("ep_add_ed_ahci\n"); spin_lock_irqsave (&usb_ed_lock, flags); ed = ed_ret = &(usb_to_ahci (usb_dev)->ed[(usb_pipeendpoint (pipe) << 1) | (usb_pipecontrol (pipe)? 0: usb_pipeout (pipe))]); if ((ed->state & ED_DEL) || (ed->state & ED_URB_DEL)) { /* pending delete request */ spin_unlock_irqrestore (&usb_ed_lock, flags); return NULL; } if (ed->state == ED_NEW) { ed->hwINFO = cpu_to_le32(OHCI_ED_SKIP); /* skip ed */ DPRINTF("ep_add_ed_ahci INIT ED: ed=(%p) interval=%d, hwINFO=%p\n", ed, interval,ed->hwINFO); /* dummy td; end of td list for ed */ td = td_alloc (ohci, SLAB_ATOMIC); /* hash the ed for later reverse mapping */ if (!td || !hash_add_ed (ohci, (ed_t *)ed)) { /* out of memory */ if (td) td_free(ohci, td); spin_unlock_irqrestore (&usb_ed_lock, flags); return NULL; } ed->TD_Addr[0] = (__u32)td; ed->hwHeadP = (td->td_dma); td = td_alloc (ohci, SLAB_ATOMIC); /* hash the ed for later reverse mapping */ if (!td || !hash_add_ed (ohci, (ed_t *)ed)) { /* out of memory */ if (td) td_free(ohci, td); spin_unlock_irqrestore (&usb_ed_lock, flags); return NULL; } ed->TD_Addr[1] = (__u32)td; td = td_alloc (ohci, SLAB_ATOMIC); /* hash the ed for later reverse mapping */ if (!td || !hash_add_ed (ohci, (ed_t *)ed)) { /* out of memory */ if (td) td_free(ohci, td); spin_unlock_irqrestore (&usb_ed_lock, flags); return NULL; } ed->TD_Addr[2] = (__u32)td; ed->TD_Addr[3] = (__u32)kmalloc(4096, GFP_DMA); ed->TD_Addr[3] |= 0xA0000000; memset((void *)ed->TD_Addr[3],0,4096); ed->hwTailP = (td->td_dma)+sizeof (*td); ed->state = ED_UNLINK; ed->type = usb_pipetype (pipe); usb_to_ahci (usb_dev)->ed_cnt++; } else { td = (struct td *)ed->TD_Addr[0]; if (ed->type == PIPE_BULK) { if ( (ed->hwHeadP) & 0x2) ed->hwHeadP = (td->td_dma) | 0x2; else ed->hwHeadP = (td->td_dma); } else { ed->hwHeadP = (td->td_dma); } } ohci->dev[usb_pipedevice (pipe)] = usb_dev; ed->hwINFO = cpu_to_le32(usb_pipedevice (pipe) | usb_pipeendpoint (pipe) << 7 // | (usb_pipeisoc (pipe)? 0x8000: 0) // | (usb_pipecontrol (pipe)? 0: (usb_pipeout (pipe)? 0x800: 0x1000)) // | usb_pipeslow (pipe) << 13 | usb_maxpacket (usb_dev, pipe, usb_pipeout (pipe)) << 16); if (!usb_pipeslow(pipe)) ed->hwINFO |= cpu_to_le32(OHCI_ED_HIGHSPEED); if (ed->type == PIPE_INTERRUPT ) ed->hwINFO |= cpu_to_le32(OHCI_ED_INT); if (ed->type == PIPE_INTERRUPT && ed->state == ED_UNLINK) { ed->int_period = interval; ed->int_load = load; } spin_unlock_irqrestore (&usb_ed_lock, flags); return ed_ret; } /*-------------------------------------------------------------------------*/ /* request the removal of an endpoint * put the ep on the rm_list and request a stop of the bulk or ctrl list * real removal is done at the next start frame (SF) hardware interrupt */ /* static void ep_rm_ed (struct usb_device * usb_dev, ed_t * ed) { unsigned int frame; ohci_t * ohci = usb_dev->bus->hcpriv; if ((ed->state & ED_DEL) || (ed->state & ED_URB_DEL)) return; ed->hwINFO |= cpu_to_le32 (OHCI_ED_SKIP); if (!ohci->disabled) { switch (ed->type) { case PIPE_CONTROL: // stop control list ohci->hc_control &= ~OHCI_CTRL_DMA_EN; // writel (ohci->hc_control, &ohci->regs->control); // WriteDw (ohci->hc_control,&ohci->regs->hostcontrol); break; case PIPE_BULK: // stop bulk list ohci->hc_control &= ~OHCI_CTRL_DMA_EN; // writel (ohci->hc_control, &ohci->regs->control); // WriteDw (ohci->hc_control,&ohci->regs->hostcontrol); break; } } frame = ReadDw (&ohci->regs->fmnumber); DPRINTF("ep_rm_ed: Frame No [R] = %08lx \n",frame); frame = (frame >>16) & 1; ed->ed_rm_list = ohci->ed_rm_list[frame]; ohci->ed_rm_list[frame] = ed; if (!ohci->disabled && !ohci->sleeping) { // writel (OHCI_INTR_SF, &ohci->regs->intrstatus); // writel (OHCI_INTR_SF, &ohci->regs->intrenable); } } */ /*-------------------------------------------------------------------------* * TD handling functions *-------------------------------------------------------------------------*/ /* enqueue next TD for this URB (AHCI spec 5.2.8.2) */ static void td_fill_ahci (ohci_t * ohci, unsigned int info, dma_addr_t data, int len, struct urb * urb, int index) { volatile td_t * td; urb_priv_t * urb_priv = urb->hcpriv; __u32 temp; if (index >= urb_priv->length) { err("internal AHCI error: TD index > length"); return; } /* use this td as the next dummy */ td = (struct td *)urb_priv->ed->TD_Addr[index]; temp = td->hwINFO; if ( temp & 0x80000000) { printk(" td_fill_ahci: Error ~~~~~~!! \n"); } td->ed = urb_priv->ed; td->next_dl_td = NULL; td->index = index; td->urb = urb; td->data_dma = data; if (!len) data = 0; //td->hwINFO = cpu_to_le32 (info); if ((td->ed->type) == PIPE_ISOCHRONOUS) { td->hwCBP = cpu_to_le32 (data & 0xFFFFF000); td->ed->last_iso = info & 0xffff; } else { if ( data & 0x0E000000) //decode over bit25 { td->ed->NeedCopy = 1; td->hwCBP = cpu_to_le32(td->ed->TD_Addr[3]); td->data_dma = cpu_to_le32(td->ed->TD_Addr[3]); if ( info & TD_DP_OUT ) { memcpy((void *)td->ed->TD_Addr[3],urb->transfer_buffer,len); td->ed->NeedCopy = 0; } } else { td->hwCBP = cpu_to_le32(data); td->ed->NeedCopy = 0; } } if (data) td->hwBufLen = cpu_to_le32(len&TD_BUFFLEN); else td->hwBufLen = 0; td->hwNextTD = td->td_dma + sizeof (*td); td->hwPSW [0] = cpu_to_le16 ((data & 0x0FFF) | 0xE000); td->hwINFO = cpu_to_le32(info); if (index == 0) //first TD td->ed->TDHead = td->td_dma; else td->hwINFO = cpu_to_le32(info | TD_OWNER); /* append to queue */ DPRINTF("1. TD buff = %08lx ED Head = %04x\n",data,urb_priv->ed->hwHeadP); } /*-------------------------------------------------------------------------*/ /* prepare all TDs of a transfer */ static void td_submit_urb_ahci (struct urb * urb) { urb_priv_t * urb_priv = urb->hcpriv; ohci_t * ohci = (ohci_t *) urb->dev->bus->hcpriv; dma_addr_t data; int data_len = urb->transfer_buffer_length; int maxps = usb_maxpacket (urb->dev, urb->pipe, usb_pipeout (urb->pipe)); int cnt = 0; __u32 info = 0; unsigned int toggle = 0; volatile td_t * td_pt=0; DPRINTF("td_submit_urb_ahci\n"); /* OHCI handles the DATA-toggles itself, we just use the USB-toggle bits for reseting */ if(usb_gettoggle(urb->dev, usb_pipeendpoint(urb->pipe), usb_pipeout(urb->pipe))) { toggle = TD_T_TOGGLE; } else { toggle = TD_T_DATA0; usb_settoggle(urb->dev, usb_pipeendpoint(urb->pipe), usb_pipeout(urb->pipe), 1); } urb_priv->td_cnt = 0; if (data_len) { data = pci_map_single (ohci->ohci_dev, urb->transfer_buffer, data_len, usb_pipeout (urb->pipe) ? PCI_DMA_TODEVICE : PCI_DMA_FROMDEVICE ); } else data = 0; switch (usb_pipetype (urb->pipe)) { case PIPE_BULK: info = usb_pipeout (urb->pipe)? TD_CC | TD_DP_OUT : TD_CC | TD_DP_IN ; while(data_len > 4096) { td_fill_ahci (ohci, info | (cnt? TD_T_TOGGLE:toggle), data, 4096, urb, cnt); data += 4096; data_len -= 4096; cnt++; } info = usb_pipeout (urb->pipe)? TD_CC | TD_DP_OUT : TD_CC | TD_R | TD_DP_IN ; td_fill_ahci (ohci, info | (cnt? TD_T_TOGGLE:toggle), data, data_len, urb, cnt); cnt++; /* If the transfer size is multiple of the pipe mtu, * we may need an extra TD to create a empty frame * Note : another way to check this condition is * to test if(urb_priv->length > cnt) - Jean II */ if ((urb->transfer_flags & USB_ZERO_PACKET) && usb_pipeout (urb->pipe) && (urb->transfer_buffer_length != 0) && ((urb->transfer_buffer_length % maxps) == 0)) { td_fill_ahci (ohci, info | (cnt? TD_T_TOGGLE:toggle), 0, 0, urb, cnt); cnt++; } //if ( cnt >1 ) // printk(" %%%%%%%%\n"); if (!ohci->sleeping) { // writel (OHCI_BLF, &ohci->regs->cmdstatus); /* start bulk list */ td_pt=(volatile td_t *)urb_priv->ed->TD_Addr[cnt-1]; } //Staat deze hier wel goed t.o.v. OHCI td_pt->hwBufLen |= cpu_to_le32(TD_INTENABLE); //(volatile td_t *)td_pt->hwNextTD = NULL; td_pt->hwNextTD = 0; //MG NULL; td_pt->ed->InUse = 1; td_pt=(volatile td_t *)urb_priv->ed->TD_Addr[0]; //writel (OHCI_CLF, &ohci->regs->cmdstatus); /* start Control list */ //writel (2, &ohci->regs->hostcontrol); /* start Control list */ td_pt->hwINFO |= le32_to_cpu(TD_OWNER); writel (6, &ohci->regs->hostcontrol); /* start Control list */ //WriteDw(OHCI_CTRL_OPER|OHCI_CTRL_DMA_EN,&ohci->regs->hostcontrol); break; case PIPE_INTERRUPT: info = usb_pipeout (urb->pipe)? TD_CC | TD_DP_OUT | toggle: TD_CC | TD_R | TD_DP_IN | toggle; td_fill_ahci (ohci, info, data, data_len, urb, cnt++); td_pt=(volatile td_t *)urb_priv->ed->TD_Addr[cnt-1]; td_pt->hwBufLen |= cpu_to_le32(TD_INTENABLE); //(volatile td_t *)td_pt->hwNextTD = NULL; td_pt->hwNextTD = 0; //MG NULL; td_pt->ed->InUse = 1; td_pt=(volatile td_t *)urb_priv->ed->TD_Addr[0]; // writel (2, &ohci->regs->hostcontrol); /* start Control list */ td_pt->hwINFO |= le32_to_cpu(TD_OWNER); writel (6, &ohci->regs->hostcontrol); /* start Control list */ break; case PIPE_CONTROL: info = TD_CC | TD_DP_SETUP | TD_T_DATA0; td_fill_ahci (ohci, info, pci_map_single (ohci->ohci_dev, urb->setup_packet, 8, PCI_DMA_TODEVICE), 8, urb, cnt++); if (data_len > 0) { info = usb_pipeout (urb->pipe)? TD_OWNER | TD_CC | TD_R | TD_DP_OUT | TD_T_DATA1 : TD_OWNER | TD_CC | TD_R | TD_DP_IN | TD_T_DATA1; /* NOTE: mishandles transfers >8K, some >4K */ td_fill_ahci (ohci, info, data, data_len, urb, cnt++); } info = usb_pipeout (urb->pipe)? TD_OWNER | TD_CC | TD_DP_IN | TD_T_DATA1: TD_OWNER | TD_CC | TD_DP_OUT | TD_T_DATA1; td_fill_ahci (ohci, info, data, 0, urb, cnt++); if (!ohci->sleeping) { td_pt=(volatile td_t *)urb_priv->ed->TD_Addr[cnt-1]; } td_pt->hwBufLen |= cpu_to_le32(TD_INTENABLE); //(volatile td_t *)td_pt->hwNextTD = NULL; td_pt->hwNextTD = 0; //MG NULL; td_pt->ed->InUse = 1; td_pt=(volatile td_t *)urb_priv->ed->TD_Addr[0]; // writel (2, &ohci->regs->hostcontrol); /* start Control list */ td_pt->hwINFO |= le32_to_cpu(TD_OWNER); writel (6, &ohci->regs->hostcontrol); /* start Control list */ break; case PIPE_ISOCHRONOUS: for (cnt = 0; cnt < urb->number_of_packets; cnt++) { td_fill_ahci (ohci, TD_CC|TD_ISO | ((urb->start_frame + cnt) & 0xffff), data + urb->iso_frame_desc[cnt].offset, urb->iso_frame_desc[cnt].length, urb, cnt); } break; } if (urb_priv->length != cnt) dbg("TD LENGTH %d != CNT %d", urb_priv->length, cnt); } /*-------------------------------------------------------------------------* * Done List handling functions *-------------------------------------------------------------------------*/ /* calculate the transfer length and update the urb */ static void dl_transfer_length_ahci(td_t * td) { __u32 tdINFO, tdBUFFLEN, tdCBP, tdLastBP,tdCnt; __u16 tdPSW; struct urb * urb = td->urb; urb_priv_t * urb_priv = urb->hcpriv; int dlen = 0; int cc = 0; tdINFO = le32_to_cpup (&td->hwINFO); tdBUFFLEN = le32_to_cpup (&td->hwBufLen) & 0xFFFF; tdCBP = le32_to_cpup (&td->hwCBP); tdCnt = le32_to_cpup (&td->hwBufLen) & 0xFFFF; tdLastBP = td->data_dma; DPRINTF("dl_transfer_length_ahci buflen=%u lastbp=%u\n",tdBUFFLEN, tdLastBP); if (tdINFO & TD_ISO) { tdPSW = le16_to_cpu (td->hwPSW[0]); cc = (tdPSW >> 12) & 0xF; if (cc < 0xE) { if (usb_pipeout(urb->pipe)) { dlen = urb->iso_frame_desc[td->index].length; } else { dlen = tdPSW & 0x3ff; } urb->actual_length += dlen; urb->iso_frame_desc[td->index].actual_length = dlen; if (!(urb->transfer_flags & USB_DISABLE_SPD) && (cc == TD_DATAUNDERRUN)) cc = TD_CC_NOERROR; urb->iso_frame_desc[td->index].status = cc_to_error[cc]; } } else { /* BULK, INT, CONTROL DATA */ if (!(usb_pipetype (urb->pipe) == PIPE_CONTROL && ((td->index == 0) || (td->index == urb_priv->length - 1)))) { if (td->hwCBP == 0) urb->actual_length += 0; else urb->actual_length += (tdCBP-tdLastBP+tdCnt); } } } /* handle an urb that is being unlinked */ /* static void dl_del_urb (struct urb * urb) { wait_queue_head_t * wait_head = ((urb_priv_t *)(urb->hcpriv))->wait; urb_rm_priv_locked_ahci (urb); if (urb->transfer_flags & USB_ASYNC_UNLINK) { urb->status = -ECONNRESET; if (urb->complete) urb->complete (urb); } else { urb->status = -ENOENT; */ /* unblock sohci_unlink_urb */ /* if (wait_head) wake_up (wait_head); } } */ /*-------------------------------------------------------------------------*/ /* there are some pending requests to remove * - some of the eds (if ed->state & ED_DEL (set by sahci_free_dev) * - some URBs/TDs if urb_priv->state == URB_DEL */ /* static void dl_del_list (ohci_t * ohci, unsigned int frame) { unsigned long flags; ed_t * ed; __u32 temp32; __u32 edINFO; td_t * tdHeadP = NULL, * tdTailP; __u32 * td_p; int ctrl = 0, bulk = 0; spin_lock_irqsave (&usb_ed_lock, flags); for (ed = ohci->ed_rm_list[frame]; ed != NULL; ed = ed->ed_rm_list) { temp32 = (ed->hwTailP) & 0xfffffff0; tdTailP = ed->TDTail; tdHeadP = ed->TDHead; edINFO = le32_to_cpup (&ed->hwINFO); td_p = &ed->hwHeadP; if (ed->state & ED_DEL) { struct ohci_device * dev = usb_to_ahci (ohci->dev[edINFO & 0x7F]); td_free (ohci, tdTailP); ed->hwINFO = cpu_to_le32 (OHCI_ED_SKIP); ed->state = ED_NEW; printk("2 ED[%08lx]\n",ed); hash_free_ed(ohci, ed); if (!--dev->ed_cnt) { wait_queue_head_t *wait_head = dev->wait; dev->wait = 0; if (wait_head) wake_up (wait_head); } } else { ed->state &= ~ED_URB_DEL; printk("3 TD [%08lx]\n",le32_to_cpup (&ed->hwHeadP)); tdHeadP = dma_to_td (ohci, le32_to_cpup (&ed->hwHeadP) & 0xfffffff0); if (tdHeadP == tdTailP) { if (ed->state == ED_OPER) ep_unlink(ohci, ed); td_free (ohci, tdTailP); ed->hwINFO = cpu_to_le32 (OHCI_ED_SKIP); ed->state = ED_NEW; printk("4 ED [%08lx]\n",ed); hash_free_ed(ohci, ed); --(usb_to_ahci (ohci->dev[edINFO & 0x7F]))->ed_cnt; } else ed->hwINFO &= ~cpu_to_le32 (OHCI_ED_SKIP); } switch (ed->type) { case PIPE_CONTROL: ctrl = 1; break; case PIPE_BULK: bulk = 1; break; } } */ /* maybe reenable control and bulk lists */ /* if (!ohci->disabled) { if (!ohci->ed_rm_list[!frame] && !ohci->sleeping) { if (ohci->ed_controltail) ohci->hc_control |= OHCI_CTRL_CLE; if (ohci->ed_bulktail) ohci->hc_control |= OHCI_CTRL_BLE; // writel (ohci->hc_control, &ohci->regs->control); } } ohci->ed_rm_list[frame] = NULL; spin_unlock_irqrestore (&usb_ed_lock, flags); } */ /*-------------------------------------------------------------------------*/ /* td done list */ static void dl_done_list (ohci_t * ohci, td_t * td_list) { ed_t * ed; int cc = 0; struct urb * urb=0; urb_priv_t * urb_priv; __u32 tdINFO; unsigned long flags=0; DPRINTF("dl_done_list\n"); while (td_list) { urb = td_list->urb; urb_priv = urb->hcpriv; tdINFO = le32_to_cpup (&td_list->hwINFO); ed = td_list->ed; dl_transfer_length_ahci(td_list); if ( ed->NeedCopy ) { ed->NeedCopy = 0; memcpy(urb->transfer_buffer,(void *)ed->TD_Addr[3],urb->actual_length); DPRINTF("Copied into buffer: %u bytes\n", urb->actual_length); } /* error code of transfer */ cc = TD_CC_GET (tdINFO); if (cc == TD_CC_STALL) usb_endpoint_halt(urb->dev, usb_pipeendpoint(urb->pipe), usb_pipeout(urb->pipe)); if (cc == TD_DATAUNDERRUN) cc = TD_CC_NOERROR; DPRINTF("CC status = %x \n",cc); urb->status = cc_to_error[cc]; spin_unlock_irqrestore (&usb_ed_lock, flags); if ( td_list ->hwNextTD) td_list = dma_to_td(ohci,td_list->hwNextTD); else td_list = NULL; } sahci_return_urb (ohci, urb); } /*-------------------------------------------------------------------------* * Virtual Root Hub *-------------------------------------------------------------------------*/ /* Device descriptor */ static __u8 root_hub_dev_des[] = { 0x12, /* __u8 bLength; */ 0x01, /* __u8 bDescriptorType; Device */ 0x10, /* __u16 bcdUSB; v1.1 */ 0x01, 0x09, /* __u8 bDeviceClass; HUB_CLASSCODE */ 0x00, /* __u8 bDeviceSubClass; */ 0x00, /* __u8 bDeviceProtocol; */ 0x08, /* __u8 bMaxPacketSize0; 8 Bytes */ 0x00, /* __u16 idVendor; */ 0x00, 0x00, /* __u16 idProduct; */ 0x00, 0x00, /* __u16 bcdDevice; */ 0x00, 0x00, /* __u8 iManufacturer; */ 0x02, /* __u8 iProduct; */ 0x01, /* __u8 iSerialNumber; */ 0x01 /* __u8 bNumConfigurations; */ }; /* Configuration descriptor */ static __u8 root_hub_config_des[] = { 0x09, /* __u8 bLength; */ 0x02, /* __u8 bDescriptorType; Configuration */ 0x19, /* __u16 wTotalLength; */ 0x00, 0x01, /* __u8 bNumInterfaces; */ 0x01, /* __u8 bConfigurationValue; */ 0x00, /* __u8 iConfiguration; */ 0x40, /* __u8 bmAttributes; Bit 7: Bus-powered, 6: Self-powered, 5 Remote-wakwup, 4..0: resvd */ 0x00, /* __u8 MaxPower; */ /* interface */ 0x09, /* __u8 if_bLength; */ 0x04, /* __u8 if_bDescriptorType; Interface */ 0x00, /* __u8 if_bInterfaceNumber; */ 0x00, /* __u8 if_bAlternateSetting; */ 0x01, /* __u8 if_bNumEndpoints; */ 0x09, /* __u8 if_bInterfaceClass; HUB_CLASSCODE */ 0x00, /* __u8 if_bInterfaceSubClass; */ 0x00, /* __u8 if_bInterfaceProtocol; */ 0x00, /* __u8 if_iInterface; */ /* endpoint */ 0x07, /* __u8 ep_bLength; */ 0x05, /* __u8 ep_bDescriptorType; Endpoint */ 0x81, /* __u8 ep_bEndpointAddress; IN Endpoint 1 */ 0x03, /* __u8 ep_bmAttributes; Interrupt */ 0x02, /* __u16 ep_wMaxPacketSize; ((MAX_ROOT_PORTS + 1) / 8 */ 0x00, 0xff /* __u8 ep_bInterval; 255 ms */ }; /* Hub class-specific descriptor is constructed dynamically */ /*-------------------------------------------------------------------------*/ /* prepare Interrupt pipe data; HUB INTERRUPT ENDPOINT */ static int ahci_rh_send_irq (ohci_t * ohci, void * rh_data, int rh_len) { int num_ports; int i; int ret; int len; __u8 data[8]; num_ports = ReadDw (&ohci->regs->rhdescriptor) & RH_NDP; if (num_ports > MAX_ROOT_PORTS) { err ("bogus NDP=%d for AHCI usb-%s", num_ports, ohci->ohci_dev->slot_name); err ("rereads as NDP=%d", ReadDw (&ohci->regs->rhdescriptor) & RH_NDP); /* retry later; "should not happen" */ return 0; } *(__u8 *) data = (ReadDw (&ohci->regs->rhdescriptor) & (RH_LPSC | RH_OCIC)) ? 1: 0; ret = *(__u8 *) data; //MG wat moet die roothub_portstatus hier? for ( i = 0; i < num_ports; i++) { *(__u8 *) (data + (i + 1) / 8) |= ((roothub_portstatus (ohci, i) & (RH_PS_CSC | RH_PS_PESC | RH_PS_PSSC | RH_PS_OCIC | RH_PS_PRSC)) ? 1: 0) << ((i + 1) % 8); ret += *(__u8 *) (data + (i + 1) / 8); } len = i/8 + 1; if (ret > 0) { memcpy(rh_data, data, min_t(unsigned int, len, min_t(unsigned int, rh_len, sizeof(data)))); return len; } return 0; } /*-------------------------------------------------------------------------*/ /* Virtual Root Hub INTs are polled by this timer every "interval" ms */ static void ahci_rh_int_timer_do (unsigned long ptr) { int len; struct urb * urb = (struct urb *) ptr; ohci_t * ohci = urb->dev->bus->hcpriv; if (ohci->disabled) return; /* ignore timers firing during PM suspend, etc */ if(ohci->rh.send) { len = ahci_rh_send_irq (ohci, urb->transfer_buffer, urb->transfer_buffer_length); if (len > 0) { urb->actual_length = len; DPRINTF("RET-t(rh) urb=%p\n",urb); if (urb->complete) urb->complete (urb); } } ahci_rh_init_int_timer (urb); } /*-------------------------------------------------------------------------*/ /* Root Hub INTs are polled by this timer */ static int ahci_rh_init_int_timer (struct urb * urb) { ohci_t * ohci = urb->dev->bus->hcpriv; //DPRINTF("@"); ohci->rh.interval = urb->interval; init_timer (&ohci->rh.rh_int_timer); ohci->rh.rh_int_timer.function = ahci_rh_int_timer_do; ohci->rh.rh_int_timer.data = (unsigned long) urb; ohci->rh.rh_int_timer.expires = jiffies + (HZ * (urb->interval < 30? 30: urb->interval)) / 1000; add_timer (&ohci->rh.rh_int_timer); return 0; } /*-------------------------------------------------------------------------*/ #define OK(x) len = (x); break #define WR_RH_STAT(x) WriteDw((x), &ohci->regs->rhdescriptor) #define WR_RH_PORTSTAT(x) WriteDw((x), &ohci->regs->portstatus[wIndex-1]) #define RD_RH_STAT roothub_status(ohci) #define RD_RH_PORTSTAT roothub_portstatus(ohci,wIndex-1) /* request to virtual root hub */ static int ahci_rh_submit_urb (struct urb * urb) { struct usb_device * usb_dev = urb->dev; ohci_t * ohci = usb_dev->bus->hcpriv; unsigned int pipe = urb->pipe; struct usb_ctrlrequest * cmd = (struct usb_ctrlrequest *) urb->setup_packet; void * data = urb->transfer_buffer; int leni = urb->transfer_buffer_length; int len = 0; int status = TD_CC_NOERROR; __u32 datab[4]; __u8 * data_buf = (__u8 *) datab; __u16 bmRType_bReq; __u16 wValue; __u16 wIndex; __u16 wLength; if (usb_pipeint(pipe)) { ohci->rh.urb = urb; ohci->rh.send = 1; ohci->rh.interval = urb->interval; ahci_rh_init_int_timer(urb); urb->status = cc_to_error [TD_CC_NOERROR]; DPRINTF("ahci_rh_submit_urb pipeint (urb:%p,pipe:%p)\n", urb,pipe); return 0; } bmRType_bReq = cmd->bRequestType | (cmd->bRequest << 8); wValue = le16_to_cpu (cmd->wValue); wIndex = le16_to_cpu (cmd->wIndex); wLength = le16_to_cpu (cmd->wLength); DPRINTF("(req:%04X val:%04X idx:%04X len:%04X) ",bmRType_bReq,wValue,wIndex,wLength); switch (bmRType_bReq) { /* Request Destination: without flags: Device, RH_INTERFACE: interface, RH_ENDPOINT: endpoint, RH_CLASS means HUB here, RH_OTHER | RH_CLASS almost ever means HUB_PORT here */ case RH_GET_STATUS: DPRINTF("RH_GET_STATUS\n"); *(__u16 *) data_buf = cpu_to_le16 (1); OK (2); case RH_GET_STATUS | RH_INTERFACE: DPRINTF("RH_GET_STATUS | RH_INTERFACE\n"); *(__u16 *) data_buf = cpu_to_le16 (0); OK (2); case RH_GET_STATUS | RH_ENDPOINT: DPRINTF("RH_GET_STATUS | RH_ENDPOINT\n"); *(__u16 *) data_buf = cpu_to_le16 (0); OK (2); case RH_GET_STATUS | RH_CLASS: DPRINTF("RH_GET_STATUS | RH_CLASS\n"); *(__u32 *) data_buf = cpu_to_le32 (RD_RH_STAT & ~(RH_HS_CRWE | RH_HS_DRWE)); OK (4); case RH_GET_STATUS | RH_OTHER | RH_CLASS: DPRINTF("RH_GET_STATUS | RH_OTHER | RH_CLASS\n"); *(__u32 *) data_buf = cpu_to_le32 (RD_RH_PORTSTAT); OK (4); case RH_CLEAR_FEATURE | RH_ENDPOINT: DPRINTF("RH_CLEAR_FEATURE | RH_ENDPOINT\n"); switch (wValue) { case (RH_ENDPOINT_STALL): OK (0); } break; case RH_CLEAR_FEATURE | RH_CLASS: DPRINTF("RH_CLEAR_FEATURE | RH_CLASS\n"); switch (wValue) { case RH_C_HUB_LOCAL_POWER: OK(0); case (RH_C_HUB_OVER_CURRENT): WR_RH_STAT(RH_HS_OCIC); OK (0); } break; case RH_CLEAR_FEATURE | RH_OTHER | RH_CLASS: DPRINTF("RH_CLEAR_FEATURE | RH_OTHER | RH_CLASS\n"); switch (wValue) { case (RH_PORT_ENABLE): WR_RH_PORTSTAT (RH_PS_CCS ); OK (0); case (RH_PORT_SUSPEND): WR_RH_PORTSTAT (RH_PS_POCI); OK (0); case (RH_PORT_POWER): WR_RH_PORTSTAT (RH_PS_LSDA); OK (0); case (RH_C_PORT_CONNECTION): WR_RH_PORTSTAT (RH_PS_CSC ); OK (0); case (RH_C_PORT_ENABLE): WR_RH_PORTSTAT (RH_PS_PESC); OK (0); case (RH_C_PORT_SUSPEND): WR_RH_PORTSTAT (RH_PS_PSSC); OK (0); case (RH_C_PORT_OVER_CURRENT): WR_RH_PORTSTAT (RH_PS_OCIC); OK (0); case (RH_C_PORT_RESET): WR_RH_PORTSTAT (RH_PS_PRSC); OK (0); } break; case RH_SET_FEATURE | RH_OTHER | RH_CLASS: DPRINTF("RH_SET_FEATURE | RH_OTHER | RH_CLASS\n"); switch (wValue) { case (RH_PORT_SUSPEND): WR_RH_PORTSTAT (RH_PS_PSS ); OK (0); case (RH_PORT_RESET): /* BUG IN HUP CODE *********/ if (RD_RH_PORTSTAT & RH_PS_CCS) { WR_RH_PORTSTAT (RH_PS_PRS | RH_PS_CSC); //mdelay(1000); mdelay(10); WR_RH_PORTSTAT (RH_PS_PES| RH_PS_CSC); mdelay(100); WriteDw(2,&ohci->regs->hostcontrol); } OK (0); case (RH_PORT_POWER): WR_RH_PORTSTAT (RH_PS_PPS ); OK (0); case (RH_PORT_ENABLE): /* BUG IN HUP CODE *********/ if (RD_RH_PORTSTAT & RH_PS_CCS) WR_RH_PORTSTAT (RH_PS_PES ); OK (0); } break; case RH_SET_ADDRESS: DPRINTF("RH_SET_ADDRESS\n"); ohci->rh.devnum = wValue; OK(0); case RH_GET_DESCRIPTOR: DPRINTF("RH_GET_DESCRIPTOR\n"); switch ((wValue & 0xff00) >> 8) { case (0x01): /* device descriptor */ len = min_t(unsigned int, leni, min_t(unsigned int, sizeof (root_hub_dev_des), wLength)); data_buf = root_hub_dev_des; OK(len); case (0x02): /* configuration descriptor */ len = min_t(unsigned int, leni, min_t(unsigned int, sizeof (root_hub_config_des), wLength)); data_buf = root_hub_config_des; OK(len); case (0x03): /* string descriptors */ len = usb_root_hub_string (wValue & 0xff, (int)(long) ohci->regs, "AHCI", data, wLength); if (len > 0) { data_buf = data; OK(min_t(int, leni, len)); } // else fallthrough default: status = TD_CC_STALL; } break; case RH_GET_DESCRIPTOR | RH_CLASS: { __u32 temp = ReadDw (&ohci->regs->rhdescriptor) ; DPRINTF("RH_GET_DESCRIPTOR | RH_CLASS\n"); data_buf [0] = 9; // min length; data_buf [1] = 0x29; data_buf [2] = temp & RH_NDP; data_buf [3] = 0; if (temp & RH_PSM) /* per-port power switching? */ data_buf [3] |= 0x1; if (temp & RH_NOCP) /* no overcurrent reporting? */ data_buf [3] |= 0x10; //else if (temp & RH_OCPM) /* per-port overcurrent reporting? */ // data_buf [3] |= 0x8; datab [1] = 0; //data_buf [5] = (temp & RH_A_POTPGT) >> 24; //temp = roothub_b (ohci); //data_buf [7] = temp & RH_B_DR; //if (data_buf [2] < 7) { data_buf [8] = 0xff; //} else { // data_buf [0] += 2; // data_buf [8] = (temp & RH_B_DR) >> 8; // data_buf [10] = data_buf [9] = 0xff; //} len = min_t(unsigned int, leni, min_t(unsigned int, data_buf [0], wLength)); OK (len); } case RH_GET_CONFIGURATION: DPRINTF("RH_GET_CONFIGURATION\n"); *(__u8 *) data_buf = 0x01; OK (1); case RH_SET_CONFIGURATION: DPRINTF("RH_SET_CONFIGURATION\n"); /* WR_RH_STAT (0x10000); */ OK (0); default: dbg ("unsupported root hub command"); status = TD_CC_STALL; } len = min_t(int, len, leni); #ifdef AHCI_VERBOSE_DEBUG { int i; for (i=0;iactual_length = len; urb->status = cc_to_error [status]; urb->hcpriv = NULL; usb_dec_dev_use (usb_dev); urb->dev = NULL; if (urb->complete) urb->complete (urb); return 0; } /*-------------------------------------------------------------------------*/ static int ahci_rh_unlink_urb (struct urb * urb) { ohci_t * ohci = urb->dev->bus->hcpriv; DPRINTF("ahci_rh_unlink_urb\n"); if (ohci->rh.urb == urb) { ohci->rh.send = 0; del_timer (&ohci->rh.rh_int_timer); ohci->rh.urb = NULL; urb->hcpriv = NULL; usb_dec_dev_use(urb->dev); urb->dev = NULL; if (urb->transfer_flags & USB_ASYNC_UNLINK) { urb->status = -ECONNRESET; if (urb->complete) urb->complete (urb); } else urb->status = -ENOENT; } return 0; } /*-------------------------------------------------------------------------* * HC functions *-------------------------------------------------------------------------*/ /* reset the HC and BUS */ static int hc_reset_ahci (ohci_t * ohci) { int timeout = 30; // int smm_timeout = 50; /* 0,5 sec */ DPRINTF("hc_reset_ahci\n"); WriteDw (0, &ohci->regs->intrenable); mdelay(10); WriteDw (OHCI_CTRL_SWRESET, &ohci->regs->control); while ((ReadDw (&ohci->regs->control) & OHCI_CTRL_SWRESET) != 0) { if (--timeout == 0) { err("USB HC reset timed out!"); return -1; } mdelay (1); } return 0; } /*-------------------------------------------------------------------------*/ /* Start an AHCI controller, set the BUS operational * enable interrupts * connect the virtual root hub */ static int hc_start_ahci (ohci_t * ohci) { __u32 mask; unsigned int fminterval; struct usb_device * usb_dev; struct ohci_device * dev; DPRINTF("hc_start_ahci\n"); ohci->disabled = 1; /* Tell the controller where the control and bulk lists are * The lists are empty now. */ WriteDw (OHCI_HOST_EN, &ohci->regs->control); WriteDw (0, &ohci->regs->ed_hosthead); fminterval = 0x20002edf; WriteDw (fminterval, &ohci->regs->fminterval); WriteDw (0x628, &ohci->regs->lsthresh); /* start controller operations */ ohci->hc_control = OHCI_CTRL_OPER; ohci->disabled = 0; /* Choose the interrupts we care about now, others later on demand */ //mask = OHCI_INT_ACT | OHCI_FATAL_INT | OHCI_SW_INT | OHCI_TD_INT | OHCI_SOF_INT; mask = OHCI_INT_ACT | OHCI_FATAL_INT | OHCI_SW_INT | OHCI_TD_INT ; WriteDw ( mask, &ohci->regs->intrenable); WriteDw ( mask, &ohci->regs->intrstatus); WriteDw (RH_NPS+RH_LPSC,&ohci->regs->rhdescriptor); WriteDw (2, &ohci->regs->hostcontrol); /* connect the virtual root hub */ ohci->rh.devnum = 0; usb_dev = usb_alloc_dev (NULL, ohci->bus); if (!usb_dev) { ohci->disabled = 1; return -ENOMEM; } dev = usb_to_ahci (usb_dev); ohci->bus->root_hub = usb_dev; usb_connect (usb_dev); if (usb_new_device (usb_dev) != 0) { usb_free_dev (usb_dev); ohci->disabled = 1; return -ENODEV; } return 0; } /*-------------------------------------------------------------------------*/ /* called only from interrupt handler */ /* static void check_timeouts (struct ohci *ohci) { spin_lock (&usb_ed_lock); while (!list_empty (&ohci->timeout_list)) { struct urb *urb; urb = list_entry (ohci->timeout_list.next, struct urb, urb_list); if (time_after (jiffies, urb->timeout)) break; list_del_init (&urb->urb_list); if (urb->status != -EINPROGRESS) continue; urb->transfer_flags |= USB_TIMEOUT_KILLED | USB_ASYNC_UNLINK; spin_unlock (&usb_ed_lock); // outside the interrupt handler (in a timer...) // this reference would race interrupts sahci_unlink_urb (urb); spin_lock (&usb_ed_lock); } spin_unlock (&usb_ed_lock); } */ /*-------------------------------------------------------------------------*/ /* an interrupt happens */ static void ahci_hc_interrupt (int irq, void * __ohci, struct pt_regs * r) { ohci_t * ohci = __ohci; ed_t * ed_tp = NULL; td_t * td_tp = NULL; int DMA_Flag = 0; __u32 hostHead ; struct ohci_regs * regs = ohci->regs; int ints; DPRINTF("ahci_hc_interrupt\n"); if ((ints = (ReadDw (®s->intrstatus) & ReadDw (®s->intrenable))) == 0) { return; } if ( ints & OHCI_FATAL_INT ) { WriteDw (OHCI_FATAL_INT, ®s->intrstatus); printk("ahci_hc_interrupt: Fatal Error !!\n"); hc_reset_ahci(ohci); } if ( ints & OHCI_SW_INT ) { WriteDw (OHCI_SW_INT, ®s->intrstatus); printk("Software Interrupt !\n"); } if ( ints & OHCI_TD_INT ) { WriteDw( ReadDw(®s->intrenable) & ~OHCI_TD_INT, ®s->intrenable); hostHead = ReadDw(&ohci->regs->ed_hosthead) & 0xfffffff0; //if (hostHead == NULL) if (hostHead == 0) //MG { WriteDw (OHCI_TD_INT, ®s->intrstatus); return; } ed_tp = (ed_t *)hostHead; while(!(ed_tp->IsLast)) { if (ed_tp->InUse) { td_tp = (volatile td_t*) ed_tp->TD_Addr[0]; if ( !((td_tp->hwINFO) & TD_OWNER) ) //process this ED { ed_tp->InUse = 0; DPRINTF("Got something in ED=%p\n",ed_tp); WriteDw(2,&ohci->regs->hostcontrol); //disable DMA dl_done_list(ohci,(void *)ed_tp->TD_Addr[0]); } #ifdef DEBUG else { DPRINTF(" Still something not complete: HEAD=%08lx TAIL=%08lx\n",ed_tp->hwHeadP,ed_tp->hwTailP); DMA_Flag = 1; } #endif } ed_tp = (ed_t *)ed_tp->hwNextED; } WriteDw(OHCI_TD_INT, ®s->intrstatus); WriteDw(ReadDw(®s->intrenable) | OHCI_TD_INT, ®s->intrenable); if ( DMA_Flag == 1) { printk(" Re ENABLE DMA \n"); DMA_Flag = 0; WriteDw(6,&ohci->regs->hostcontrol); //enable DMA } } //if (ints & OHCI_SOF_INT) { /* if (0) { //unsigned int frame = le16_to_cpu (®s->fmnumber) & 1; unsigned long frame = ReadDw(®s->fmnumber); frame = (frame >>16) & 1; WriteDw( ReadDw(®s->intrenable) & ~OHCI_SOF_INT, ®s->intrenable); WriteDw (OHCI_SOF_INT, ®s->intrstatus); DPRINTF("frame = %08lx %08lx ==== %08lx \n",ReadDw(®s->fmnumber),ohci->ed_rm_list[!frame],ohci->ed_rm_list[frame]); if (ohci->ed_rm_list[!frame] != NULL) { DPRINTF("DL DEL List \n"); dl_del_list (ohci, !frame); } if (ohci->ed_rm_list[frame] != NULL) WriteDw(OHCI_INTR_SF, ®s->intrenable); //writel (OHCI_INTR_SF, ®s->intrenable); WriteDw( ReadDw(®s->intrenable) | OHCI_SOF_INT, ®s->intrenable); } */ DPRINTF("Interrupt exit===>\n"); //WriteDw (ints, ®s->intrstatus); //writel (OHCI_INTR_MIE, ®s->intrenable); } /*-------------------------------------------------------------------------*/ /* allocate OHCI */ static ohci_t * __devinit hc_alloc_ahci (void * mem_base) { ohci_t * ohci; struct pci_dev *dev; DPRINTF("hc_alloc_ahci (%p)\n",mem_base); ohci = (ohci_t *) kmalloc (sizeof *ohci, GFP_KERNEL); if (!ohci) return NULL; memset (ohci, 0, sizeof (ohci_t)); dev = NULL ; // Not PCI Device ohci->disabled = 1; ohci->sleeping = 0; ohci->irq = -1; ohci->regs = mem_base; ohci->ohci_dev = dev; //pci_set_drvdata(dev, ohci); INIT_LIST_HEAD (&ohci->ohci_hcd_list); list_add (&ohci->ohci_hcd_list, &ohci_hcd_list); INIT_LIST_HEAD (&ohci->timeout_list); ohci->bus = usb_alloc_bus (&sahci_device_operations); if (!ohci->bus) { kfree (ohci); return NULL; } ohci->bus->bus_name = hcd_name; ohci->bus->hcpriv = (void *) ohci; return ohci; } /*-------------------------------------------------------------------------*/ /* De-allocate all resources.. */ static void ahci_hc_release_ohci (ohci_t * ohci) { dbg ("USB HC release ohci usb-%s", hcd_name); /* disconnect all devices */ if (ohci->bus->root_hub) usb_disconnect (&ohci->bus->root_hub); if (!ohci->disabled) hc_reset_ahci (ohci); if (ohci->irq >= 0) { free_irq (ohci->irq, ohci); ohci->irq = -1; } //pci_set_drvdata(ohci->ohci_dev, NULL); if (ohci->bus) { usb_deregister_bus (ohci->bus); usb_free_bus (ohci->bus); list_del (&ohci->ohci_hcd_list); INIT_LIST_HEAD (&ohci->ohci_hcd_list); } ahci_mem_cleanup (ohci); /* unmap the IO address space */ iounmap (ohci->regs); //pci_free_consistent (ohci->ohci_dev, sizeof *ohci->hcca, //ohci->hcca, ohci->hcca_dma); kfree (ohci); } /*-------------------------------------------------------------------------*/ /* Increment the module usage count, start the control thread and * return success. */ //static struct pci_driver ohci_pci_driver; static int __devinit hc_found_ahci ( int irq, void *mem_base) { ohci_t * ohci; //char buf[8], *bufp = buf; int ret; printk(KERN_INFO "USB AHCI at membase 0x%lx, IRQ %i\n", (unsigned long) mem_base, irq); ohci = hc_alloc_ahci (mem_base); if (!ohci) { return -ENOMEM; } if ((ret = ahci_mem_init (ohci)) < 0) { ahci_hc_release_ohci (ohci); return ret; } if (hc_reset_ahci (ohci) < 0) { ahci_hc_release_ohci (ohci); return -ENODEV; } usb_register_bus (ohci->bus); if (request_irq (irq, ahci_hc_interrupt, SA_SHIRQ, hcd_name, ohci) != 0) { err ("request interrupt %i failed", irq); ahci_hc_release_ohci (ohci); return -EBUSY; } ohci->irq = irq; if (hc_start_ahci (ohci) < 0) { err ("can't start usb-%s", hcd_name); ahci_hc_release_ohci (ohci); return -EBUSY; } #ifdef DEBUG //ohci_dump (ohci, 1); #endif return 0; } /*-------------------------------------------------------------------------*/ /* configured so that an OHCI device is always provided */ /* always called with process context; sleeping is OK */ static int __devinit ahci_ahb_probe (void) { unsigned long mem_resource, mem_len; void *mem_base; int irq; DPRINTF("ahci_ahb_probe\n"); /* we read its hardware registers as memory */ irq = 0x3; //0x3<===== Adm5120 USB Host IRQ No. mem_resource = USBHOST_BASE; //0x11200000; mem_len = 0x84; if (!request_mem_region (mem_resource, mem_len, hcd_name)) { dbg ("controller already in use"); } mem_base = ioremap_nocache (mem_resource, mem_len); if (!mem_base) { err("Error mapping OHCI memory"); return -EFAULT; } return hc_found_ahci (irq, mem_base); } /*-------------------------------------------------------------------------*/ /* static const struct pci_device_id __devinitdata ohci_pci_ids [] = { { vendor: 0x1022, device: 0x740c, subvendor: PCI_ANY_ID, subdevice: PCI_ANY_ID, driver_data: OHCI_QUIRK_AMD756, } , { class: ((PCI_CLASS_SERIAL_USB << 8) | 0x10), class_mask: ~0, vendor: PCI_ANY_ID, device: PCI_ANY_ID, subvendor: PCI_ANY_ID, subdevice: PCI_ANY_ID, }, {} }; */ /* MODULE_DEVICE_TABLE (pci, ohci_pci_ids); static struct pci_driver ohci_pci_driver = { name: "usb-ahci", id_table: &ahci_pci_ids [0], probe: ahci_pci_probe, remove: __devexit_p(ahci_pci_remove), #ifdef CONFIG_PM suspend: ahci_pci_suspend, resume: ahci_pci_resume, #endif }; */ /*-------------------------------------------------------------------------*/ static int __init ahci_hcd_init (void) { printk(KERN_INFO "Start Init AHCI_INIT " __DATE__ "\n"); return ahci_ahb_probe(); } /*-------------------------------------------------------------------------*/ static void __exit ahci_hcd_cleanup (void) { printk(KERN_INFO "Stop AHCI driver\n"); //pci_unregister_driver (&ohci_pci_driver); } module_init (ahci_hcd_init); module_exit (ahci_hcd_cleanup); MODULE_AUTHOR( DRIVER_AUTHOR ); MODULE_DESCRIPTION( DRIVER_DESC ); MODULE_LICENSE("GPL");